MPM=DISABLE, RXINV=DISABLE, ERRSDMA=DISABLE, OVS=X16, CCEN=DISABLE, LOOPBK=DISABLE, SYNC=ASYNC, AUTOTRI=DISABLE, MSBF=DISABLE, TXINV=DISABLE, ERRSTX=DISABLE, ERRSRX=DISABLE
No Description
| SYNC | Synchronous Mode 0 (ASYNC): The EUSART operates in asynchronous mode 1 (SYNC): The EUSART operates in synchronous mode |
| LOOPBK | Loopback Enable 0 (DISABLE): The receiver is connected to and receives data from UARTn_RX 1 (ENABLE): The receiver is connected to and receives data from UARTn_TX |
| CCEN | Collision Check Enable 0 (DISABLE): Collision check is disabled 1 (ENABLE): Collision check is enabled. The receiver must be enabled for the check to be performed |
| MPM | Multi-Processor Mode 0 (DISABLE): The 9th bit of incoming frames has no special function 1 (ENABLE): An incoming frame with the 9th bit equal to MPAB will be loaded into the RX FIFO regardless of RXBLOCK and will result in the MPAB interrupt flag being set |
| MPAB | Multi-Processor Address-Bit |
| OVS | Oversampling 0 (X16): 16X oversampling 1 (X8): 8X oversampling 2 (X6): 6X oversampling 3 (X4): 4X oversampling 4 (DISABLE): Disable oversampling (for LF operation) |
| MSBF | Most Significant Bit First 0 (DISABLE): Data is sent with the least significant bit first 1 (ENABLE): Data is sent with the most significant bit first |
| RXINV | Receiver Input Invert 0 (DISABLE): Input is passed directly to the receiver 1 (ENABLE): Input is inverted before it is passed to the receiver |
| TXINV | Transmitter output Invert 0 (DISABLE): Output from the transmitter is passed unchanged to UARTn_TX 1 (ENABLE): Output from the transmitter is inverted before it is passed to UARTn_TX |
| AUTOTRI | Automatic TX Tristate 0 (DISABLE): The output on UARTn_TX when the transmitter is idle is defined by TXINV 1 (ENABLE): UARTn_TX is tristated whenever the transmitter is idle |
| SKIPPERRF | Skip Parity Error Frames |
| ERRSDMA | Halt DMA Read On Error 0 (DISABLE): Framing and parity errors have no effect on DMA requests from the EUSART 1 (ENABLE): DMA requests from the EUSART are blocked while the PERR or FERR interrupt flags are set |
| ERRSRX | Disable RX On Error 0 (DISABLE): Framing and parity errors have no effect on receiver 1 (ENABLE): Framing and parity errors disable the receiver |
| ERRSTX | Disable TX On Error 0 (DISABLE): Received framing and parity errors have no effect on transmitter 1 (ENABLE): Received framing and parity errors disable the transmitter |
| MVDIS | Majority Vote Disable |
| AUTOBAUDEN | AUTOBAUD detection enable |